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| ATPG | ||
| Author anuo2008 Views 17 Posted at 2008/8/28 05:58 [View In Forum] | ||
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In asic design team, who will responsible for ATPG? Front-end designertkpvvu tkpvvu or back-end designer? |
| Reply No. | Replier | Total Replies 29 [View All Replies] [New Reply] | Replied at |
| 1 | ct731 | The front-end designers are responsible for ATPG, they know how to make their design meet the DFT requirements. By the way, some back-end tools do fix some (hold-time) timing violations or modify the scan chain for routibility. | 2008/8/28 05:58 |
| 2 | scuzt | In big companies, generally there is a separate DFT group which is in charge of inserting DFT related logic and generating scan patterns (using either ATPG or dumping functional patterns). In small companies, I have seen both back end and front end people do it. It is a easy task, most of the time. It just depends on who's got more free time |
2008/8/28 05:58 |
| 3 | z4120356 | Pls tell me what tools to produce the atpg test vector? | 2008/8/28 05:58 |
| 4 | 398338 | there are some tools for atpg. but, alomost pepple use as bellows tool. 1. synopsys test_compiler ( until 2001.08 version) Synopysys testgen Synopsys TetraMax ( now ) 2. Syntest 3. veritest 4. mentor DFT architecture |
2008/8/28 05:58 |
| 5 | rickli | PM, Product Manager, is responsible!! He (PM) assigned anyone he want to do the job.. |
2008/8/28 05:58 |
| 6 | dongyea | Who knows where can get "Synopsys TetraMax" software? Thanks |
2008/8/28 05:58 |
| 7 | zunwang | 1. Off-topic!!! 2. Ask Synopsys about your local sales office... |
2008/8/28 05:59 |
| 8 | 398338 | 2008/8/28 05:59 | |
| 9 | bubulu | DFT issue should be cover throughout the entire flow 1.testing guy will have a test concept at the begining 2.then this is planed by FE guy(usually a specify person will be reponsible for this) 3.implement this concept in the design 4.after all the RTL finish, run through scan chain insertion and ATPG coverage, feed back the weak point to the RTL designers to improve the coverage. so far this is what i know, and I am sure that for the BE they also will have some consideration of ATPG from the beginning |
2008/8/28 05:59 |
| 10 | 398338 | Cadence testbench is another ATPG tool | 2008/8/28 05:59 |
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